MC100EP196A chip equivalent, 3.3 v ecl programmable delay chip.
Pin Name
I/O Default State
Description
23, 25, 26, 27, D[0:9] LVCMOS, LVTTL, Low Single−Ended Parallel Data Inputs [0:9]. Internal 75 kW to VEE.
29, 30, 31, 32,
ECL Input
(Note 1)
1, 2
3
4 5
6 7 8 9, 24, 28
D[10]
IN IN
LVCMOS, LVTTL, ECL I.
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